ruby-changes:73242
From: Kevin <ko1@a...>
Date: Tue, 30 Aug 2022 01:04:58 +0900 (JST)
Subject: [ruby-changes:73242] a95422a691 (master): Binary OR instruction for the IR (https://github.com/Shopify/ruby/pull/355)
https://git.ruby-lang.org/ruby.git/commit/?id=a95422a691 From a95422a69167baba0e4d086b234ad5316d3c39fe Mon Sep 17 00:00:00 2001 From: Kevin Newton <kddnewton@g...> Date: Thu, 4 Aug 2022 10:31:16 -0400 Subject: Binary OR instruction for the IR (https://github.com/Shopify/ruby/pull/355) --- yjit/src/backend/arm64/mod.rs | 14 +++++++++++++- yjit/src/backend/ir.rs | 5 +++++ yjit/src/backend/x86_64/mod.rs | 6 +++++- 3 files changed, 23 insertions(+), 2 deletions(-) diff --git a/yjit/src/backend/arm64/mod.rs b/yjit/src/backend/arm64/mod.rs index e0e889c16c..9dc49a7686 100644 --- a/yjit/src/backend/arm64/mod.rs +++ b/yjit/src/backend/arm64/mod.rs @@ -175,7 +175,7 @@ impl Assembler https://github.com/ruby/ruby/blob/trunk/yjit/src/backend/arm64/mod.rs#L175 } } }, - Op::And => { + Op::And | Op::Or => { match (opnds[0], opnds[1]) { (Opnd::Reg(_), Opnd::Reg(_)) => { asm.and(opnds[0], opnds[1]); @@ -567,6 +567,9 @@ impl Assembler https://github.com/ruby/ruby/blob/trunk/yjit/src/backend/arm64/mod.rs#L567 Op::And => { and(cb, insn.out.into(), insn.opnds[0].into(), insn.opnds[1].into()); }, + Op::Or => { + orr(cb, insn.out.into(), insn.opnds[0].into(), insn.opnds[1].into()); + }, Op::Not => { mvn(cb, insn.out.into(), insn.opnds[0].into()); }, @@ -886,6 +889,15 @@ mod tests { https://github.com/ruby/ruby/blob/trunk/yjit/src/backend/arm64/mod.rs#L889 asm.compile_with_num_regs(&mut cb, 1); } + #[test] + fn test_emit_or() { + let (mut asm, mut cb) = setup_asm(); + + let opnd = asm.or(Opnd::Reg(X0_REG), Opnd::Reg(X1_REG)); + asm.store(Opnd::mem(64, Opnd::Reg(X2_REG), 0), opnd); + asm.compile_with_num_regs(&mut cb, 1); + } + #[test] fn test_emit_test() { let (mut asm, mut cb) = setup_asm(); diff --git a/yjit/src/backend/ir.rs b/yjit/src/backend/ir.rs index f634fb7678..99a084ff02 100644 --- a/yjit/src/backend/ir.rs +++ b/yjit/src/backend/ir.rs @@ -57,6 +57,10 @@ pub enum Op https://github.com/ruby/ruby/blob/trunk/yjit/src/backend/ir.rs#L57 // binary AND operation. And, + // This is the same as the OP_ADD instruction, except that it performs the + // binary OR operation. + Or, + // Perform the NOT operation on an individual operand, and return the result // as a new operand. This operand can then be used as the operand on another // instruction. @@ -899,6 +903,7 @@ def_push_jcc!(jo, Op::Jo); https://github.com/ruby/ruby/blob/trunk/yjit/src/backend/ir.rs#L903 def_push_2_opnd!(add, Op::Add); def_push_2_opnd!(sub, Op::Sub); def_push_2_opnd!(and, Op::And); +def_push_2_opnd!(or, Op::Or); def_push_1_opnd!(not, Op::Not); def_push_1_opnd_no_out!(cpush, Op::CPush); def_push_0_opnd!(cpop, Op::CPop); diff --git a/yjit/src/backend/x86_64/mod.rs b/yjit/src/backend/x86_64/mod.rs index 13bb106b97..7074c8980b 100644 --- a/yjit/src/backend/x86_64/mod.rs +++ b/yjit/src/backend/x86_64/mod.rs @@ -113,7 +113,7 @@ impl Assembler https://github.com/ruby/ruby/blob/trunk/yjit/src/backend/x86_64/mod.rs#L113 }; match op { - Op::Add | Op::Sub | Op::And | Op::Cmp => { + Op::Add | Op::Sub | Op::And | Op::Cmp | Op::Or => { let (opnd0, opnd1) = match (opnds[0], opnds[1]) { (Opnd::Mem(_), Opnd::Mem(_)) => { (asm.load(opnds[0]), asm.load(opnds[1])) @@ -271,6 +271,10 @@ impl Assembler https://github.com/ruby/ruby/blob/trunk/yjit/src/backend/x86_64/mod.rs#L271 and(cb, insn.opnds[0].into(), insn.opnds[1].into()) }, + Op::Or => { + or(cb, insn.opnds[0].into(), insn.opnds[1].into()); + }, + Op::Not => { not(cb, insn.opnds[0].into()) }, -- cgit v1.2.1 -- ML: ruby-changes@q... Info: http://www.atdot.net/~ko1/quickml/