ruby-changes:73307
From: Kevin <ko1@a...>
Date: Tue, 30 Aug 2022 01:10:00 +0900 (JST)
Subject: [ruby-changes:73307] f883aabc13 (master): Instruction enum (https://github.com/Shopify/ruby/pull/423)
https://git.ruby-lang.org/ruby.git/commit/?id=f883aabc13 From f883aabc13d334771da926e632dca5758bb506c8 Mon Sep 17 00:00:00 2001 From: Kevin Newton <kddnewton@g...> Date: Thu, 18 Aug 2022 15:39:18 -0400 Subject: Instruction enum (https://github.com/Shopify/ruby/pull/423) * Remove references to explicit instruction parts Previously we would reference individual instruction fields manually. We can't do that with instructions that are enums, so this commit removes those references. As a side effect, we can remove the push_insn_parts() function from the assembler because we now explicitly push instruction structs every time. * Switch instructions to enum Instructions are now no longer a large struct with a bunch of optional fields. Instead they are an enum with individual shapes for the variants. In terms of size, the instruction struct was 120 bytes while the new instruction enum is 106 bytes. The bigger win however is that we're not allocating any vectors for instruction operands (except for CCall), which should help cut down on memory usage. Adding new instructions will be a little more complicated going forward, but every mission-critical function that needs to be touched will have an exhaustive match, so the compiler should guide any additions. --- yjit/src/backend/arm64/mod.rs | 426 +++++++++++--------- yjit/src/backend/ir.rs | 888 ++++++++++++++++++++++------------------- yjit/src/backend/tests.rs | 8 +- yjit/src/backend/x86_64/mod.rs | 431 +++++++++++--------- 4 files changed, 960 insertions(+), 793 deletions(-) diff --git a/yjit/src/backend/arm64/mod.rs b/yjit/src/backend/arm64/mod.rs index a32be6a6b2..60cdf2b9d1 100644 --- a/yjit/src/backend/arm64/mod.rs +++ b/yjit/src/backend/arm64/mod.rs @@ -59,6 +59,13 @@ impl From<Opnd> for A64Opnd { https://github.com/ruby/ruby/blob/trunk/yjit/src/backend/arm64/mod.rs#L59 } } +/// Also implement going from a reference to an operand for convenience. +impl From<&Opnd> for A64Opnd { + fn from(opnd: &Opnd) -> Self { + A64Opnd::from(*opnd) + } +} + impl Assembler { // A special scratch register for intermediate processing. @@ -182,6 +189,41 @@ impl Assembler https://github.com/ruby/ruby/blob/trunk/yjit/src/backend/arm64/mod.rs#L189 } } + /// Returns the operands that should be used for a boolean logic + /// instruction. + fn split_boolean_operands(asm: &mut Assembler, opnd0: Opnd, opnd1: Opnd) -> (Opnd, Opnd) { + match (opnd0, opnd1) { + (Opnd::Reg(_), Opnd::Reg(_)) => { + (opnd0, opnd1) + }, + (reg_opnd @ Opnd::Reg(_), other_opnd) | + (other_opnd, reg_opnd @ Opnd::Reg(_)) => { + let opnd1 = split_bitmask_immediate(asm, other_opnd); + (reg_opnd, opnd1) + }, + _ => { + let opnd0 = split_load_operand(asm, opnd0); + let opnd1 = split_bitmask_immediate(asm, opnd1); + (opnd0, opnd1) + } + } + } + + /// Returns the operands that should be used for a csel instruction. + fn split_csel_operands(asm: &mut Assembler, opnd0: Opnd, opnd1: Opnd) -> (Opnd, Opnd) { + let opnd0 = match opnd0 { + Opnd::Reg(_) | Opnd::InsnOut { .. } => opnd0, + _ => split_load_operand(asm, opnd0) + }; + + let opnd1 = match opnd1 { + Opnd::Reg(_) | Opnd::InsnOut { .. } => opnd1, + _ => split_load_operand(asm, opnd1) + }; + + (opnd0, opnd1) + } + let mut asm_local = Assembler::new_with_label_names(std::mem::take(&mut self.label_names)); let asm = &mut asm_local; let mut iterator = self.into_draining_iter(); @@ -192,7 +234,7 @@ impl Assembler https://github.com/ruby/ruby/blob/trunk/yjit/src/backend/arm64/mod.rs#L234 // such that only the Op::Load instruction needs to handle that // case. If the values aren't heap objects then we'll treat them as // if they were just unsigned integer. - let skip_load = matches!(insn, Insn { op: Op::Load, .. }); + let skip_load = matches!(insn, Insn::Load { .. }); let mut opnd_iter = insn.opnd_iter_mut(); while let Some(opnd) = opnd_iter.next() { @@ -209,10 +251,10 @@ impl Assembler https://github.com/ruby/ruby/blob/trunk/yjit/src/backend/arm64/mod.rs#L251 } match insn { - Insn { op: Op::Add, opnds, .. } => { - match (opnds[0], opnds[1]) { + Insn::Add { left, right, .. } => { + match (left, right) { (Opnd::Reg(_) | Opnd::InsnOut { .. }, Opnd::Reg(_) | Opnd::InsnOut { .. }) => { - asm.add(opnds[0], opnds[1]); + asm.add(left, right); }, (reg_opnd @ (Opnd::Reg(_) | Opnd::InsnOut { .. }), other_opnd) | (other_opnd, reg_opnd @ (Opnd::Reg(_) | Opnd::InsnOut { .. })) => { @@ -220,30 +262,25 @@ impl Assembler https://github.com/ruby/ruby/blob/trunk/yjit/src/backend/arm64/mod.rs#L262 asm.add(reg_opnd, opnd1); }, _ => { - let opnd0 = split_load_operand(asm, opnds[0]); - let opnd1 = split_shifted_immediate(asm, opnds[1]); + let opnd0 = split_load_operand(asm, left); + let opnd1 = split_shifted_immediate(asm, right); asm.add(opnd0, opnd1); } } }, - Insn { op: Op::And | Op::Or | Op::Xor, opnds, target, text, pos_marker, .. } => { - match (opnds[0], opnds[1]) { - (Opnd::Reg(_), Opnd::Reg(_)) => { - asm.push_insn_parts(insn.op, vec![opnds[0], opnds[1]], target, text, pos_marker); - }, - (reg_opnd @ Opnd::Reg(_), other_opnd) | - (other_opnd, reg_opnd @ Opnd::Reg(_)) => { - let opnd1 = split_bitmask_immediate(asm, other_opnd); - asm.push_insn_parts(insn.op, vec![reg_opnd, opnd1], target, text, pos_marker); - }, - _ => { - let opnd0 = split_load_operand(asm, opnds[0]); - let opnd1 = split_bitmask_immediate(asm, opnds[1]); - asm.push_insn_parts(insn.op, vec![opnd0, opnd1], target, text, pos_marker); - } - } + Insn::And { left, right, .. } => { + let (opnd0, opnd1) = split_boolean_operands(asm, left, right); + asm.and(opnd0, opnd1); + }, + Insn::Or { left, right, .. } => { + let (opnd0, opnd1) = split_boolean_operands(asm, left, right); + asm.or(opnd0, opnd1); }, - Insn { op: Op::CCall, opnds, target, .. } => { + Insn::Xor { left, right, .. } => { + let (opnd0, opnd1) = split_boolean_operands(asm, left, right); + asm.xor(opnd0, opnd1); + }, + Insn::CCall { opnds, target, .. } => { assert!(opnds.len() <= C_ARG_OPNDS.len()); // For each of the operands we're going to first load them @@ -258,60 +295,82 @@ impl Assembler https://github.com/ruby/ruby/blob/trunk/yjit/src/backend/arm64/mod.rs#L295 // Now we push the CCall without any arguments so that it // just performs the call. - asm.ccall(target.unwrap().unwrap_fun_ptr(), vec![]); + asm.ccall(target.unwrap_fun_ptr(), vec![]); }, - Insn { op: Op::Cmp, opnds, .. } => { - let opnd0 = match opnds[0] { - Opnd::Reg(_) | Opnd::InsnOut { .. } => opnds[0], - _ => split_load_operand(asm, opnds[0]) + Insn::Cmp { left, right } => { + let opnd0 = match left { + Opnd::Reg(_) | Opnd::InsnOut { .. } => left, + _ => split_load_operand(asm, left) }; - let opnd1 = split_shifted_immediate(asm, opnds[1]); + let opnd1 = split_shifted_immediate(asm, right); asm.cmp(opnd0, opnd1); }, - Insn { op: Op::CRet, opnds, .. } => { - if opnds[0] != Opnd::Reg(C_RET_REG) { - let value = split_load_operand(asm, opnds[0]); + Insn::CRet(opnd) => { + if opnd != Opnd::Reg(C_RET_REG) { + let value = split_load_operand(asm, opnd); asm.mov(C_RET_OPND, value); } asm.cret(C_RET_OPND); }, - Insn { op: Op::CSelZ | Op::CSelNZ | Op::CSelE | Op::CSelNE | Op::CSelL | Op::CSelLE | Op::CSelG | Op::CSelGE, opnds, target, text, pos_marker, .. } => { - let new_opnds = opnds.into_iter().map(|opnd| { - match opnd { - Opnd::Reg(_) | Opnd::InsnOut { .. } => opnd, - _ => split_load_operand(asm, opnd) - } - }).collect(); - - asm.push_insn_parts(insn.op, new_opnds, target, text, pos_marker); + Insn::CSelZ { truthy, falsy, .. } => { + let (opnd0, opnd1) = split_csel (... truncated) -- ML: ruby-changes@q... Info: http://www.atdot.net/~ko1/quickml/