https://git.ruby-lang.org/ruby.git/commit/?id=a5ea577cc6

From a5ea577cc6fc43c5bd5beaef3f6175832a55268a Mon Sep 17 00:00:00 2001
From: Kevin Newton <kddnewton@g...>
Date: Mon, 8 Aug 2022 17:37:03 -0400
Subject: Update flags for data processing on ARM
 (https://github.com/Shopify/ruby/pull/380)

* Update flags for data processing on ARM

* Update yjit/src/backend/arm64/mod.rs

Co-authored-by: Maxime Chevalier-Boisvert <maximechevalierb@g...>
---
 yjit/src/backend/arm64/mod.rs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/yjit/src/backend/arm64/mod.rs b/yjit/src/backend/arm64/mod.rs
index d6e8e831c7..db2a30aec0 100644
--- a/yjit/src/backend/arm64/mod.rs
+++ b/yjit/src/backend/arm64/mod.rs
@@ -550,7 +550,7 @@ impl Assembler https://github.com/ruby/ruby/blob/trunk/yjit/src/backend/arm64/mod.rs#L550
                     }
                 },
                 Op::Add => {
-                    add(cb, insn.out.into(), insn.opnds[0].into(), insn.opnds[1].into());
+                    adds(cb, insn.out.into(), insn.opnds[0].into(), insn.opnds[1].into());
                 },
                 Op::FrameSetup => {
                     stp_pre(cb, X29, X30, A64Opnd::new_mem(128, C_SP_REG, -16));
@@ -565,7 +565,7 @@ impl Assembler https://github.com/ruby/ruby/blob/trunk/yjit/src/backend/arm64/mod.rs#L565
                     ldp_post(cb, X29, X30, A64Opnd::new_mem(128, C_SP_REG, 16));
                 },
                 Op::Sub => {
-                    sub(cb, insn.out.into(), insn.opnds[0].into(), insn.opnds[1].into());
+                    subs(cb, insn.out.into(), insn.opnds[0].into(), insn.opnds[1].into());
                 },
                 Op::And => {
                     and(cb, insn.out.into(), insn.opnds[0].into(), insn.opnds[1].into());
-- 
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