ruby-changes:73255
From: Takashi <ko1@a...>
Date: Tue, 30 Aug 2022 01:05:10 +0900 (JST)
Subject: [ruby-changes:73255] a55a3f8ad1 (master): Port opt_minus, opt_or, and opt_and to the new IR (https://github.com/Shopify/ruby/pull/364)
https://git.ruby-lang.org/ruby.git/commit/?id=a55a3f8ad1 From a55a3f8ad1104870d7a92f6d296325a415ed6910 Mon Sep 17 00:00:00 2001 From: Takashi Kokubun <takashikkbn@g...> Date: Fri, 5 Aug 2022 08:47:09 -0700 Subject: Port opt_minus, opt_or, and opt_and to the new IR (https://github.com/Shopify/ruby/pull/364) * Port opt_minus, opt_or, and opt_and to the new IR * Fix the Op::Or issue with push_insn * Prefer asm.store for clarity --- yjit/src/backend/arm64/mod.rs | 6 +++--- yjit/src/codegen.rs | 47 +++++++++++++++++++------------------------ 2 files changed, 24 insertions(+), 29 deletions(-) diff --git a/yjit/src/backend/arm64/mod.rs b/yjit/src/backend/arm64/mod.rs index 778f1b6992..2cddf55756 100644 --- a/yjit/src/backend/arm64/mod.rs +++ b/yjit/src/backend/arm64/mod.rs @@ -181,17 +181,17 @@ impl Assembler https://github.com/ruby/ruby/blob/trunk/yjit/src/backend/arm64/mod.rs#L181 Op::And | Op::Or => { match (opnds[0], opnds[1]) { (Opnd::Reg(_), Opnd::Reg(_)) => { - asm.and(opnds[0], opnds[1]); + asm.push_insn(op, vec![opnds[0], opnds[1]], target, text, pos_marker); }, (reg_opnd @ Opnd::Reg(_), other_opnd) | (other_opnd, reg_opnd @ Opnd::Reg(_)) => { let opnd1 = split_bitmask_immediate(asm, other_opnd); - asm.and(reg_opnd, opnd1); + asm.push_insn(op, vec![reg_opnd, opnd1], target, text, pos_marker); }, _ => { let opnd0 = asm.load(opnds[0]); let opnd1 = split_bitmask_immediate(asm, opnds[1]); - asm.and(opnd0, opnd1); + asm.push_insn(op, vec![opnd0, opnd1], target, text, pos_marker); } } }, diff --git a/yjit/src/codegen.rs b/yjit/src/codegen.rs index 33524c160f..33de061095 100644 --- a/yjit/src/codegen.rs +++ b/yjit/src/codegen.rs @@ -2809,16 +2809,17 @@ fn gen_opt_aset( https://github.com/ruby/ruby/blob/trunk/yjit/src/codegen.rs#L2809 gen_opt_send_without_block(jit, ctx, cb, ocb) } } +*/ fn gen_opt_and( jit: &mut JITState, ctx: &mut Context, - cb: &mut CodeBlock, + asm: &mut Assembler, ocb: &mut OutlinedCb, ) -> CodegenStatus { // Defer compilation so we can specialize on a runtime `self` if !jit_at_current_insn(jit) { - defer_compilation(jit, ctx, cb, ocb); + defer_compilation(jit, ctx, asm, ocb); return EndBlock; } @@ -2835,36 +2836,35 @@ fn gen_opt_and( https://github.com/ruby/ruby/blob/trunk/yjit/src/codegen.rs#L2836 } // Check that both operands are fixnums - guard_two_fixnums(ctx, cb, side_exit); + guard_two_fixnums(ctx, asm, side_exit); // Get the operands and destination from the stack let arg1 = ctx.stack_pop(1); let arg0 = ctx.stack_pop(1); // Do the bitwise and arg0 & arg1 - mov(cb, REG0, arg0); - and(cb, REG0, arg1); + let val = asm.and(arg0, arg1); // Push the output on the stack let dst = ctx.stack_push(Type::Fixnum); - mov(cb, dst, REG0); + asm.store(dst, val); KeepCompiling } else { // Delegate to send, call the method on the recv - gen_opt_send_without_block(jit, ctx, cb, ocb) + gen_opt_send_without_block(jit, ctx, asm, ocb) } } fn gen_opt_or( jit: &mut JITState, ctx: &mut Context, - cb: &mut CodeBlock, + asm: &mut Assembler, ocb: &mut OutlinedCb, ) -> CodegenStatus { // Defer compilation so we can specialize on a runtime `self` if !jit_at_current_insn(jit) { - defer_compilation(jit, ctx, cb, ocb); + defer_compilation(jit, ctx, asm, ocb); return EndBlock; } @@ -2881,36 +2881,35 @@ fn gen_opt_or( https://github.com/ruby/ruby/blob/trunk/yjit/src/codegen.rs#L2881 } // Check that both operands are fixnums - guard_two_fixnums(ctx, cb, side_exit); + guard_two_fixnums(ctx, asm, side_exit); // Get the operands and destination from the stack let arg1 = ctx.stack_pop(1); let arg0 = ctx.stack_pop(1); // Do the bitwise or arg0 | arg1 - mov(cb, REG0, arg0); - or(cb, REG0, arg1); + let val = asm.or(arg0, arg1); // Push the output on the stack let dst = ctx.stack_push(Type::Fixnum); - mov(cb, dst, REG0); + asm.store(dst, val); KeepCompiling } else { // Delegate to send, call the method on the recv - gen_opt_send_without_block(jit, ctx, cb, ocb) + gen_opt_send_without_block(jit, ctx, asm, ocb) } } fn gen_opt_minus( jit: &mut JITState, ctx: &mut Context, - cb: &mut CodeBlock, + asm: &mut Assembler, ocb: &mut OutlinedCb, ) -> CodegenStatus { // Defer compilation so we can specialize on a runtime `self` if !jit_at_current_insn(jit) { - defer_compilation(jit, ctx, cb, ocb); + defer_compilation(jit, ctx, asm, ocb); return EndBlock; } @@ -2927,29 +2926,27 @@ fn gen_opt_minus( https://github.com/ruby/ruby/blob/trunk/yjit/src/codegen.rs#L2926 } // Check that both operands are fixnums - guard_two_fixnums(ctx, cb, side_exit); + guard_two_fixnums(ctx, asm, side_exit); // Get the operands and destination from the stack let arg1 = ctx.stack_pop(1); let arg0 = ctx.stack_pop(1); // Subtract arg0 - arg1 and test for overflow - mov(cb, REG0, arg0); - sub(cb, REG0, arg1); - jo_ptr(cb, side_exit); - add(cb, REG0, imm_opnd(1)); + let val_untag = asm.sub(arg0, arg1); + asm.jo(side_exit.into()); + let val = asm.add(val_untag, Opnd::Imm(1)); // Push the output on the stack let dst = ctx.stack_push(Type::Fixnum); - mov(cb, dst, REG0); + asm.store(dst, val); KeepCompiling } else { // Delegate to send, call the method on the recv - gen_opt_send_without_block(jit, ctx, cb, ocb) + gen_opt_send_without_block(jit, ctx, asm, ocb) } } -*/ fn gen_opt_mult( jit: &mut JITState, @@ -5957,11 +5954,9 @@ fn get_gen_fn(opcode: VALUE) -> Option<InsnGenFn> { https://github.com/ruby/ruby/blob/trunk/yjit/src/codegen.rs#L5954 YARVINSN_setlocal_WC_0 => Some(gen_setlocal_wc0), YARVINSN_setlocal_WC_1 => Some(gen_setlocal_wc1), YARVINSN_opt_plus => Some(gen_opt_plus), - /* YARVINSN_opt_minus => Some(gen_opt_minus), YARVINSN_opt_and => Some(gen_opt_and), YARVINSN_opt_or => Some(gen_opt_or), - */ YARVINSN_newhash => Some(gen_newhash), YARVINSN_duphash => Some(gen_duphash), YARVINSN_newarray => Some(gen_newarray), -- cgit v1.2.1 -- ML: ruby-changes@q... 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