ruby-changes:73137
From: Maxime <ko1@a...>
Date: Tue, 30 Aug 2022 00:55:20 +0900 (JST)
Subject: [ruby-changes:73137] 4dbc1e1d82 (master): Port bitwise not, gen_check_ints()
https://git.ruby-lang.org/ruby.git/commit/?id=4dbc1e1d82 From 4dbc1e1d825b4a50e3847de788da0ab6a8d860ae Mon Sep 17 00:00:00 2001 From: Maxime Chevalier-Boisvert <maxime.chevalierboisvert@s...> Date: Tue, 14 Jun 2022 16:02:43 -0400 Subject: Port bitwise not, gen_check_ints() --- yjit/src/backend/ir.rs | 1 + yjit/src/backend/x86_64/mod.rs | 10 +++++----- yjit/src/codegen.rs | 25 ++++++++++--------------- 3 files changed, 16 insertions(+), 20 deletions(-) diff --git a/yjit/src/backend/ir.rs b/yjit/src/backend/ir.rs index 10e04c8e2b..86e590e846 100644 --- a/yjit/src/backend/ir.rs +++ b/yjit/src/backend/ir.rs @@ -681,6 +681,7 @@ def_push_jcc!(jnz, Op::Jnz); https://github.com/ruby/ruby/blob/trunk/yjit/src/backend/ir.rs#L681 def_push_2_opnd!(add, Op::Add); def_push_2_opnd!(sub, Op::Sub); def_push_2_opnd!(and, Op::And); +def_push_1_opnd!(not, Op::Not); def_push_1_opnd_no_out!(cpush, Op::CPush); def_push_1_opnd_no_out!(cpop, Op::CPop); def_push_1_opnd_no_out!(cret, Op::CRet); diff --git a/yjit/src/backend/x86_64/mod.rs b/yjit/src/backend/x86_64/mod.rs index 17571dd45b..a67cddb98e 100644 --- a/yjit/src/backend/x86_64/mod.rs +++ b/yjit/src/backend/x86_64/mod.rs @@ -76,11 +76,11 @@ impl Assembler https://github.com/ruby/ruby/blob/trunk/yjit/src/backend/x86_64/mod.rs#L76 self.transform_insns(|asm, index, op, opnds, target| { match op { - Op::Add | Op::Sub | Op::And => { - match opnds.as_slice() { + Op::Add | Op::Sub | Op::And | Op::Not => { + match opnds[0] { // Instruction output whose live range spans beyond this instruction - [Opnd::InsnOut(out_idx), _] => { - if live_ranges[*out_idx] > index { + Opnd::InsnOut(out_idx) => { + if live_ranges[out_idx] > index { let opnd0 = asm.load(opnds[0]); asm.push_insn(op, vec![opnd0, opnds[1]], None); return; @@ -88,7 +88,7 @@ impl Assembler https://github.com/ruby/ruby/blob/trunk/yjit/src/backend/x86_64/mod.rs#L88 }, // We have to load memory and register operands to avoid corrupting them - [Opnd::Mem(_) | Opnd::Reg(_), _] => { + Opnd::Mem(_) | Opnd::Reg(_) => { let opnd0 = asm.load(opnds[0]); asm.push_insn(op, vec![opnd0, opnds[1]], None); return; diff --git a/yjit/src/codegen.rs b/yjit/src/codegen.rs index 95d29689fb..c1ed715f0f 100644 --- a/yjit/src/codegen.rs +++ b/yjit/src/codegen.rs @@ -658,27 +658,22 @@ pub fn gen_entry_prologue(cb: &mut CodeBlock, iseq: IseqPtr, insn_idx: u32) -> O https://github.com/ruby/ruby/blob/trunk/yjit/src/codegen.rs#L658 return Some(code_ptr); } -/* // Generate code to check for interrupts and take a side-exit. // Warning: this function clobbers REG0 -fn gen_check_ints(cb: &mut CodeBlock, side_exit: CodePtr) { +fn gen_check_ints(asm: &mut Assembler, side_exit: CodePtr) { // Check for interrupts // see RUBY_VM_CHECK_INTS(ec) macro - add_comment(cb, "RUBY_VM_CHECK_INTS(ec)"); - mov( - cb, - REG0_32, - mem_opnd(32, REG_EC, RUBY_OFFSET_EC_INTERRUPT_MASK), - ); - not(cb, REG0_32); - test( - cb, - mem_opnd(32, REG_EC, RUBY_OFFSET_EC_INTERRUPT_FLAG), - REG0_32, + asm.comment("RUBY_VM_CHECK_INTS(ec)"); + + let not_mask = asm.not(Opnd::mem(32, EC, RUBY_OFFSET_EC_INTERRUPT_MASK)); + + asm.test( + Opnd::mem(32, EC, RUBY_OFFSET_EC_INTERRUPT_FLAG), + not_mask, ); - jnz_ptr(cb, side_exit); + + asm.jnz(Target::CodePtr(side_exit)); } -*/ // Generate a stubbed unconditional jump to the next bytecode instruction. // Blocks that are part of a guard chain can use this to share the same successor. -- cgit v1.2.1 -- ML: ruby-changes@q... Info: http://www.atdot.net/~ko1/quickml/