ruby-changes:52601
From: nobu <ko1@a...>
Date: Sun, 23 Sep 2018 05:13:15 +0900 (JST)
Subject: [ruby-changes:52601] nobu:r64812 (trunk): Fix for old names of mcontext registers
nobu 2018-09-23 05:13:08 +0900 (Sun, 23 Sep 2018) New Revision: 64812 https://svn.ruby-lang.org/cgi-bin/viewvc.cgi?view=revision&revision=64812 Log: Fix for old names of mcontext registers c.f. https://github.com/mistydemeo/tigerbrew/issues/473 Modified files: trunk/signal.c trunk/vm_dump.c Index: vm_dump.c =================================================================== --- vm_dump.c (revision 64811) +++ vm_dump.c (revision 64812) @@ -13,6 +13,9 @@ https://github.com/ruby/ruby/blob/trunk/vm_dump.c#L13 #include "addr2line.h" #include "vm_core.h" #include "iseq.h" +#ifdef HAVE_UCONTEXT_H +#include "ucontext.h" +#endif /* see vm_insnhelper.h for the values */ #ifndef VMDEBUG @@ -407,6 +410,14 @@ rb_vmdebug_thread_dump_state(VALUE self) https://github.com/ruby/ruby/blob/trunk/vm_dump.c#L410 return Qnil; } +#if defined __APPLE__ +# if __DARWIN_UNIX03 +# define MCTX_SS_REG(reg) __ss.__##reg +# else +# define MCTX_SS_REG(reg) ss.reg +# endif +#endif + #if defined(HAVE_BACKTRACE) # ifdef HAVE_LIBUNWIND # undef backtrace @@ -449,23 +460,23 @@ darwin_sigtramp: https://github.com/ruby/ruby/blob/trunk/vm_dump.c#L460 */ unw_get_reg(&cursor, UNW_X86_64_RBX, &ip); uctx = (ucontext_t *)ip; - unw_set_reg(&cursor, UNW_X86_64_RAX, uctx->uc_mcontext->__ss.__rax); - unw_set_reg(&cursor, UNW_X86_64_RBX, uctx->uc_mcontext->__ss.__rbx); - unw_set_reg(&cursor, UNW_X86_64_RCX, uctx->uc_mcontext->__ss.__rcx); - unw_set_reg(&cursor, UNW_X86_64_RDX, uctx->uc_mcontext->__ss.__rdx); - unw_set_reg(&cursor, UNW_X86_64_RDI, uctx->uc_mcontext->__ss.__rdi); - unw_set_reg(&cursor, UNW_X86_64_RSI, uctx->uc_mcontext->__ss.__rsi); - unw_set_reg(&cursor, UNW_X86_64_RBP, uctx->uc_mcontext->__ss.__rbp); - unw_set_reg(&cursor, UNW_X86_64_RSP, 8+(uctx->uc_mcontext->__ss.__rsp)); - unw_set_reg(&cursor, UNW_X86_64_R8, uctx->uc_mcontext->__ss.__r8); - unw_set_reg(&cursor, UNW_X86_64_R9, uctx->uc_mcontext->__ss.__r9); - unw_set_reg(&cursor, UNW_X86_64_R10, uctx->uc_mcontext->__ss.__r10); - unw_set_reg(&cursor, UNW_X86_64_R11, uctx->uc_mcontext->__ss.__r11); - unw_set_reg(&cursor, UNW_X86_64_R12, uctx->uc_mcontext->__ss.__r12); - unw_set_reg(&cursor, UNW_X86_64_R13, uctx->uc_mcontext->__ss.__r13); - unw_set_reg(&cursor, UNW_X86_64_R14, uctx->uc_mcontext->__ss.__r14); - unw_set_reg(&cursor, UNW_X86_64_R15, uctx->uc_mcontext->__ss.__r15); - ip = uctx->uc_mcontext->__ss.__rip; + unw_set_reg(&cursor, UNW_X86_64_RAX, uctx->uc_mcontext->MCTX_SS_REG(rax)); + unw_set_reg(&cursor, UNW_X86_64_RBX, uctx->uc_mcontext->MCTX_SS_REG(rbx)); + unw_set_reg(&cursor, UNW_X86_64_RCX, uctx->uc_mcontext->MCTX_SS_REG(rcx)); + unw_set_reg(&cursor, UNW_X86_64_RDX, uctx->uc_mcontext->MCTX_SS_REG(rdx)); + unw_set_reg(&cursor, UNW_X86_64_RDI, uctx->uc_mcontext->MCTX_SS_REG(rdi)); + unw_set_reg(&cursor, UNW_X86_64_RSI, uctx->uc_mcontext->MCTX_SS_REG(rsi)); + unw_set_reg(&cursor, UNW_X86_64_RBP, uctx->uc_mcontext->MCTX_SS_REG(rbp)); + unw_set_reg(&cursor, UNW_X86_64_RSP, 8+(uctx->uc_mcontext->MCTX_SS_REG(rsp))); + unw_set_reg(&cursor, UNW_X86_64_R8, uctx->uc_mcontext->MCTX_SS_REG(r8)); + unw_set_reg(&cursor, UNW_X86_64_R9, uctx->uc_mcontext->MCTX_SS_REG(r9)); + unw_set_reg(&cursor, UNW_X86_64_R10, uctx->uc_mcontext->MCTX_SS_REG(r10)); + unw_set_reg(&cursor, UNW_X86_64_R11, uctx->uc_mcontext->MCTX_SS_REG(r11)); + unw_set_reg(&cursor, UNW_X86_64_R12, uctx->uc_mcontext->MCTX_SS_REG(r12)); + unw_set_reg(&cursor, UNW_X86_64_R13, uctx->uc_mcontext->MCTX_SS_REG(r13)); + unw_set_reg(&cursor, UNW_X86_64_R14, uctx->uc_mcontext->MCTX_SS_REG(r14)); + unw_set_reg(&cursor, UNW_X86_64_R15, uctx->uc_mcontext->MCTX_SS_REG(r15)); + ip = uctx->uc_mcontext->MCTX_SS_REG(rip); /* There are 4 cases for SEGV: * (1) called invalid address @@ -498,7 +509,7 @@ darwin_sigtramp: https://github.com/ruby/ruby/blob/trunk/vm_dump.c#L509 /* if segv is caused by invalid call or signal received in syscall */ /* the frame is invalid; skip */ trace[n++] = (void *)ip; - ip = *(unw_word_t*)uctx->uc_mcontext->__ss.__rsp; + ip = *(unw_word_t*)uctx->uc_mcontext->MCTX_SS_REG(rsp); } trace[n++] = (void *)ip; unw_set_reg(&cursor, UNW_REG_IP, ip); @@ -843,7 +854,7 @@ print_machine_register(size_t reg, const https://github.com/ruby/ruby/blob/trunk/vm_dump.c#L854 # ifdef __linux__ # define dump_machine_register(reg) (col_count = print_machine_register(mctx->gregs[REG_##reg], #reg, col_count, 80)) # elif defined __APPLE__ -# define dump_machine_register(reg) (col_count = print_machine_register(mctx->__ss.__##reg, #reg, col_count, 80)) +# define dump_machine_register(reg) (col_count = print_machine_register(mctx->MCTX_SS_REG(reg), #reg, col_count, 80)) # endif static void Index: signal.c =================================================================== --- signal.c (revision 64811) +++ signal.c (revision 64812) @@ -854,12 +854,17 @@ check_stack_overflow(int sig, const uint https://github.com/ruby/ruby/blob/trunk/signal.c#L854 const greg_t bp = mctx->gregs[REG_EBP]; # endif # elif defined __APPLE__ +# if __DARWIN_UNIX03 +# define MCTX_SS_REG(reg) __ss.__##reg +# else +# define MCTX_SS_REG(reg) ss.reg +# endif # if defined(__LP64__) - const uintptr_t sp = mctx->__ss.__rsp; - const uintptr_t bp = mctx->__ss.__rbp; + const uintptr_t sp = mctx->MCTX_SS_REG(rsp); + const uintptr_t bp = mctx->MCTX_SS_REG(rbp); # else - const uintptr_t sp = mctx->__ss.__esp; - const uintptr_t bp = mctx->__ss.__ebp; + const uintptr_t sp = mctx->MCTX_SS_REG(esp); + const uintptr_t bp = mctx->MCTX_SS_REG(ebp); # endif # elif defined __FreeBSD__ # if defined(__amd64__) -- ML: ruby-changes@q... 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